from 0, < 3.20210608.2~deb9u2
from 0, < 3.20210608.2~deb10u1
from 0, < 3.20210608.1
HIGH8.2Improper input validation in some Intel(R) TDX module software before version 1.5.05.46.698 may allow a privileged user to potentially enab…
from 0, < 3.20240514.1~deb11u1
HIGH7.8intel-microcode - security update
from 0, < 3.20231114.1~deb11u1
HIGH7.8intel-microcode - security update
from 0, < 3.20231114.1~deb11u1
HIGH7.8intel-microcode - security update
from 0, < 3.20231114.1~deb10u1
MEDIUM6.8intel-microcode - security update
from 0, < 3.20230214.1~deb11u1
MEDIUM6.8intel-microcode - security update
from 0, < 3.20230214.1~deb10u1
MEDIUM6.7Improper input validation in some Intel(R) TDX module software before version 1.5.05.46.698 may allow a privileged user to potentially enab…
from 0, < 3.20240514.1~deb11u1
MEDIUM6.7Unauthorized error injection in Intel(R) SGX or Intel(R) TDX for some Intel(R) Xeon(R) Processors may allow a privileged user to potentiall…
from 0, < 3.20230808.1~deb11u1
MEDIUM6.7Incorrect default permissions in some memory controller configurations for some Intel(R) Xeon(R) Processors when using Intel(R) Software Gu…
from 0, < 3.20230214.1~deb11u1
MEDIUM6.5Protection mechanism failure of bus lock regulator for some Intel(R) Processors may allow an unauthenticated user to potentially enable den…
from 0, < 3.20240312.1~deb11u1
MEDIUM6.5xen - security update
from 0, < 3.20240312.1~deb11u1
MEDIUM6.5linux - security update
from 0, < 3.20230808.1~deb11u1
MEDIUM6.5linux - security update
from 0, < 3.20230808.1~deb10u1
MEDIUM6.5linux - security update
from 0, < 3.20230808.1~deb11u1
MEDIUM6.5Domain-bypass transient execution vulnerability in some Intel Atom(R) Processors may allow an authenticated user to potentially enable info…
from 0, < 3.20210608.1
MEDIUM6.5Improper isolation of shared resources in some Intel(R) Processors may allow an authenticated user to potentially enable information disclo…
from 0, < 3.20210608.1
MEDIUM6.5intel-microcode - security update
from 0, < 3.20191112.1~deb9u1
MEDIUM6.5intel-microcode - security update
from 0, < 3.20191115.2~deb8u1
MEDIUM6.5intel-microcode - security update
from 0, < 3.20191112.1
MEDIUM6.4Systems with microprocessors utilizing speculative execution and Intel software guard extensions (Intel SGX) may allow unauthorized disclos…
from 0, < 3.20180703.1
MEDIUM6.1intel-microcode - security update
from 0, < 3.20240312.1~deb11u1
MEDIUM6.1intel-microcode - security update
from 0, < 3.20240312.1~deb10u1
MEDIUM6.0Improper conditions check in the voltage modulation interface for some Intel(R) Xeon(R) Scalable Processors may allow a privileged user to…
from 0, < 3.20191112.1
MEDIUM5.6Microarchitectural Data Sampling Uncacheable Memory (MDSUM): Uncacheable memory on some microprocessors utilizing speculative execution may…
from 0, < 3.20190514.1
MEDIUM5.6Microarchitectural Fill Buffer Data Sampling (MFBDS): Fill buffers on some microprocessors utilizing speculative execution may allow an aut…
from 0, < 3.20190514.1
MEDIUM5.6Microarchitectural Load Port Data Sampling (MLPDS): Load ports on some microprocessors utilizing speculative execution may allow an authent…
from 0, < 3.20190514.1
MEDIUM5.6intel-microcode - security update
from 0, < 3.20190618.1~deb8u1
MEDIUM5.6intel-microcode - security update
from 0, < 3.20190514.1~deb9u1
MEDIUM5.6intel-microcode - security update
from 0, < 3.20190514.1
MEDIUM5.6intel-microcode - security update
from 0, < 3.20190514.1~deb8u1
MEDIUM5.6Systems with microprocessors utilizing speculative execution and address translations may allow unauthorized disclosure of information resi…
from 0, < 3.20180703.1
MEDIUM5.6linux - security update
from 0, < 3.20180703.1
MEDIUM5.6Systems with microprocessors utilizing speculative execution and that perform speculative reads of system registers may allow unauthorized…
from 0, < 3.20180703.1
MEDIUM5.6xen - security update
from 0, < 3.20180425.1
MEDIUM5.5Non-transparent sharing of return predictor targets between contexts in some Intel(R) Processors may allow an authorized user to potentiall…
from 0, < 3.20240312.1~deb11u1
MEDIUM5.5Improper isolation of shared resources in some Intel(R) Processors may allow a privileged user to potentially enable information disclosure…
from 0, < 3.20230214.1~deb11u1
MEDIUM5.5Incomplete cleanup in specific special register write operations for some Intel(R) Processors may allow an authenticated user to potentiall…
from 0, < 3.20220510.1~deb11u1
MEDIUM5.5Incomplete cleanup in specific special register read operations for some Intel(R) Processors may allow an authenticated user to potentially…
from 0, < 3.20220510.1~deb11u1
MEDIUM5.5Incomplete cleanup of microarchitectural fill buffers on some Intel(R) Processors may allow an authenticated user to potentially enable inf…
from 0, < 3.20220510.1~deb11u1
MEDIUM5.5xen - security update
from 0, < 3.20220510.1~deb10u1
MEDIUM5.5xen - security update
from 0, < 3.20220510.1~deb11u1
MEDIUM5.5Processor optimization removal or modification of security-critical code for some Intel(R) Processors may allow an authenticated user to po…
from 0, < 3.20220510.1~deb11u1
MEDIUM5.5Improper access control for some 3rd Generation Intel(R) Xeon(R) Scalable Processors before BIOS version MR7, may allow a local attacker to…
from 0, < 3.20220207.1~deb11u1
MEDIUM5.5Improper initialization of shared resources in some Intel(R) Processors may allow an authenticated user to potentially enable information d…
from 0, < 3.20220207.1~deb11u1
MEDIUM5.5Insufficient control flow management in some Intel(R) Processors may allow an authenticated user to potentially enable a denial of service…
from 0, < 3.20220207.1~deb11u1
MEDIUM5.5Improper isolation of shared resources in some Intel(R) Processors may allow an authenticated user to potentially enable information disclo…
from 0, < 3.20201110.1
MEDIUM5.5Improper removal of sensitive information before storage or transfer in some Intel(R) Processors may allow an authenticated user to potenti…
from 0, < 3.20201110.1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20201118.1~deb9u1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20201110.1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20200609.2~deb8u1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20200609.2~deb9u1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20200609.1
MEDIUM5.5Cleanup errors in some data cache evictions for some Intel(R) Processors may allow an authenticated user to potentially enable information…
from 0, < 3.20200609.1
MEDIUM5.5Cleanup errors in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.
from 0, < 3.20200609.1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20180807a.1~deb9u1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20180703.1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20180703.2~deb9u1
MEDIUM5.5intel-microcode - security update
from 0, < 3.20180703.2~deb8u1
MEDIUM5.4Out of bounds read under complex microarchitectural condition in memory subsystem for some Intel Atom(R) Processors may allow authenticated…
from 0, < 3.20220207.1~deb11u1
MEDIUM5.3Incorrect calculation in microcode keying mechanism for some Intel(R) Xeon(R) D Processors with Intel(R) SGX may allow a privileged user to…
from 0, < 3.20240312.1~deb11u1
MEDIUM5.3intel-microcode - security update
from 0, < 3.20191115.2~deb9u1
MEDIUM5.3intel-microcode - security update
from 0, < 3.20191115.1
MEDIUM4.7Sequence of processor instructions leads to unexpected behavior in Intel(R) Core(TM) Ultra Processors may allow an authenticated user to po…
from 0, < 3.20240514.1~deb11u1
MEDIUM4.4Improper access control in some 3rd Generation Intel(R) Xeon(R) Scalable processors may allow a privileged user to potentially enable infor…
from 0, < 3.20230808.1~deb11u1
MEDIUM4.4Improper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software Guard Extensions may allow a privileged use…
from 0, < 3.20230214.1~deb11u1
MEDIUM4.4Incorrect calculation in microcode keying mechanism for some 3rd Generation Intel(R) Xeon(R) Scalable Processors may allow a privileged use…
from 0, < 3.20230214.1~deb11u1
LOW3.3Observable timing discrepancy in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via…
from 0, < 3.20210608.1
LOW2.8Hardware logic contains race conditions in some Intel(R) Processors may allow an authenticated user to potentially enable partial informati…
from 0, < 3.20240514.1~deb11u1
—Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R)…
from 0
—Improper handling of values in the microcode flow for some Intel(R) Processor Family may allow an escalation of privilege.
from 0
—Improperly implemented security check for standard in the DDRIO configuration for some Intel(R) Xeon(R) 6 Processors when using Intel(R) SG…
from 0, < 3.20250812.1~deb11u1
—Out-of-bounds write in the memory subsystem for some Intel(R) Xeon(R) 6 processors when using Intel(R) SGX or Intel(R) TDX may allow a priv…
from 0, < 3.20250812.1~deb11u1
—Insufficient control flow management in the Alias Checking Trusted Module (ACTM) firmware for some Intel(R) Xeon(R) processors may allow a…
from 0, < 3.20250812.1~deb11u1
—Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processor with Intel(R) TDX may allow a privileged…
from 0, < 3.20250812.1~deb11u1
—Sequence of processor instructions leads to unexpected behavior for some Intel(R) Xeon(R) 6 Scalable processors may allow an authenticated…
from 0, < 3.20250812.1~deb11u1
—Insufficient granularity of access control in the OOB-MSM for some Intel(R) Xeon(R) 6 Scalable processors may allow a privileged user to po…
from 0, < 3.20250812.1~deb11u1
—Missing reference to active allocated resource for some Intel(R) Xeon(R) processors may allow an authenticated user to potentially enable d…
from 0, < 3.20250812.1~deb11u1
—Improper Isolation or Compartmentalization in the stream cache mechanism for some Intel(R) Processors may allow an authenticated user to po…
from 0, < 3.20250812.1~deb11u1
—intel-microcode - security update
from 0, < 3.20250812.1~deb12u1
—intel-microcode - security update
from 0, < 3.20250812.1~deb11u1
—intel-microcode - security update
from 0, < 3.20250812.1~deb11u1
—Incorrect initialization of resource in the branch prediction unit for some Intel(R) Core™ Ultra Processors may allow an authenticated user…
from 0, < 3.20250512.1~deb11u1
—Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel(R)…
from 0, < 3.20250512.1~deb11u1
—Insufficient resource pool in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially ena…
from 0, < 3.20250512.1~deb11u1
—Uncaught exception in the core management mechanism for some Intel(R) Processors may allow an authenticated user to potentially enable deni…
from 0, < 3.20250512.1~deb11u1
—Incorrect behavior order for some Intel(R) Core™ Ultra Processors may allow an unauthenticated user to potentially enable information discl…
from 0, < 3.20250512.1~deb11u1
—Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect b…
from 0, < 3.20250512.1~deb11u1
—Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel At…
from 0, < 3.20250512.1~deb11u1
—xen - security update
from 0, < 3.20250512.1~deb11u1
—xen - security update
from 0, < 3.20250512.1~deb12u1
—xen - security update
from 0, < 3.20250512.1~deb11u1
—Improper handling of physical or environmental conditions in some Intel(R) Processors may allow an authenticated user to enable denial of s…
from 0, < 3.20250211.1~deb11u1
—Insufficient granularity of access control in UEFI firmware in some Intel(R) processors may allow a authenticated user to potentially enabl…
from 0, < 3.20250211.1~deb11u1
—Sequence of processor instructions leads to unexpected behavior in the Intel(R) DSA V1.0 for some Intel(R) Xeon(R) Processors may allow an…
from 0, < 3.20250211.1~deb11u1
—Improper access control in the EDECCSSA user leaf function for some Intel(R) Processors with Intel(R) SGX may allow an authenticated user t…
from 0, < 3.20250211.1~deb11u1
—Improper initialization in UEFI firmware OutOfBandXML module in some Intel(R) Processors may allow a privileged user to potentially enable…
from 0, < 3.20250211.1~deb11u1
—Improper Finite State Machines (FSMs) in Hardware Logic for some Intel(R) Processors may allow privileged user to potentially enable denial…
from 0, < 3.20250211.1~deb11u1